Vad är en front side bus fsb
Front-side bus explained
The front-side bus (FSB) fryst vatten a computer communication interface (bus) that was often used in Intel-chip-based computers during the 1990s and 2000s. The EV6 bus served the same function for competing AMD CPUs. Both typically carry uppgifter between the huvud processing enhet (CPU) and a memory kontrollant hub, known as the northbridge.[1]
Depending on the implementation, some computers may also have a back-side bus that connects the centralenhet i en dator to the cache.
This bus and the cache connected to it are faster than accessing the struktur memory (or RAM) via the front-side bus. The speed of the front side bus fryst vatten often used as an important measure of the performance of a computer.
The original front-side bus architecture has been replaced bygd HyperTransport, Intel QuickPath Interconnect, direkt Media Interface and nowadays bygd Intel något som är extremt eller ytterst Path Interconnect in modern Intel CPUs for anställda computers.
History
The begrepp came into use bygd Intel Corporation about the time the Pentium Pro and Pentium II products were announced, in the 1990s.
"Front side" refers to the external interface from the processor to the rest of the computer struktur, as opposed to the back side, where the back-side bus connects the cache (and potentially other CPUs).[2]
A front-side bus (FSB) fryst vatten mostly used on PC-related motherboards (including anställda computers and servers).
They are seldom used in embedded systems or similar small computers. The FSB design was a performance improvement over the single struktur bus designs of the previous decades, but these front-side buses are sometimes referred to as the "system bus".
Front-side buses usually connect the centralenhet i en dator and the rest of the hardware via a chipset, which Intel implemented as a northbridge and a southbridge.
Other buses like the Peripheral Component Interconnect (PCI), Accelerated Graphics Port (AGP), and memory buses all connect to the chipset in beställning for uppgifter to flow between the connected devices. These secondary struktur buses usually run at speeds derived from the front-side bus clock, but are not necessarily synchronized to it.
In response to AMD's Torrenza initiative, Intel opened its FSB centralenhet i en dator socket to third party devices.[3] Prior to this announcement, made in Spring 2007 at Intel Developer Forum in Beijing, Intel had very closely guarded who had tillgång to the FSB, only allowing Intel processors in the centralenhet i en dator socket.
The first example was field-programmable gate array (FPGA) co-processors, a result of collaboration between Intel-Xilinx-Nallatech[4] and Intel-Altera-XtremeData (which shipped in 2008).[5][6][7]
Related component speeds
CPU
The frequency at which a processor (CPU) operates fryst vatten determined bygd applying a clock multiplier to the front-side bus (FSB) speed in some cases.
For example, a processor running at 3200 MHz might be using a 400 MHz FSB. This means there fryst vatten an internal clock multiplier setting (also called bus/core ratio) of 8. That fryst vatten, the centralenhet i en dator fryst vatten set to run at 8 times the frequency of the front-side bus: 400 MHz × 8 = 3200 MHz.
Different centralenhet i en dator speeds are achieved bygd varying either the FSB frequency or the centralenhet i en dator multiplier, this fryst vatten referred to as overclocking or underclocking.
Memory
See also: Memory divider.
Setting an FSB speed fryst vatten related directly to the speed grade of memory a struktur must use.
The front-side bus (FSB) is a computer communication interface that was often used in Intel-chip-based computers during the 1990s and 2000sThe memory bus connects the northbridge and RAM, just as the front-side bus connects the centralenhet i en dator and northbridge. Often, these two buses must operate at the same frequency. Increasing the front-side bus to 450 MHz in most cases also means running the memory at 450 MHz.
In newer systems, it fryst vatten possible to see memory ratios of "4:5" and the like.
The memory will run 5/4 times as fast as the FSB in this situation, meaning a 400 MHz bus can run with the memory at 500 MHz.
All activity between the CPU and the rest of the computer traveled across the FSB, so it was also called the "system busThis fryst vatten often referred to as an 'asynchronous' struktur. Due to differences in centralenhet i en dator and struktur architecture, overall struktur performance can vary in unexpected ways with different FSB-to-memory ratios.
In image, audio, film, gaming, FPGA synthesis and scientific applications that perform a small amount of work on each element of a large information set, FSB speed becomes a major performance issue.
A slow FSB will cause the centralenhet i en dator to spend significant amounts of time waiting for information to arrive from struktur memory. However, if the computations involving each element are more complex, the processor will spend längre performing these; therefore, the FSB will be able to keep pace because the rate at which the memory fryst vatten accessed fryst vatten reduced.
Peripheral buses
Similar to the memory bus, the PCI and AGP buses can also be run asynchronously from the front-side bus.
In older systems, these buses are operated at a set fraction of the front-side bus frequency. This fraction was set bygd the BIOS. In newer systems, the PCI, AGP, and PCI något som utförs snabbt exempelvis expressleverans peripheral buses often receive their own clock signals, which eliminates their dependence on the front-side bus for timing.
Overclocking
See main article: Overclocking.
Overclocking fryst vatten the practice of making computer components operate beyond their lager performance levels bygd manipulating the frequencies at which the component fryst vatten set to run, and, when necessary, modifying the voltage sent to the component to allow it to operate at these higher frequencies with more stability.
Many motherboards allow the user to manually set the clock multiplier and FSB settings bygd changing jumpers or BIOS settings.
I den här artikeln kommer du att lära dig vad en frontsidebuss är, dess betydelse i datorarkitektur och hur den påverkar den övergripande prestandan hos ett datorsystemAlmost all centralenhet i en dator manufacturers now "lock" a preset multiplier setting into the chip. It fryst vatten possible to unlock some locked CPUs; for instance, some AMD Athlon processors can be unlocked bygd connecting electrical contacts across points on the CPU's surface. Some other processors from AMD and Intel are unlocked from the factory and labeled as an "enthusiast-grade" processors bygd end users and retailers because of this feature.
For all processors, increasing the FSB speed can be done to boost processing speed bygd reducing latency between centralenhet i en dator and the northbridge.
This practice pushes components beyond their specifications and may cause erratic behavior, overheating or premature failure. Even if the computer appears to run normally, problems may appear beneath a heavy load.
Most PCs purchased from retailers or manufacturers, such as Hewlett-Packard or Dell, do not allow the user to change the multiplier or FSB settings due to the probability of erratic behavior or failure. Motherboards purchased separately to build a anpassad machine are more likely to allow the user to edit the multiplier and FSB settings in the PC's BIOS.
Evolution
The front-side bus had the advantage of high flexibility and low cost when it was first designed.
Simple symmetric multiprocessors place a number of CPUs on a shared FSB, though performance could not scale linearly due to bandwidth bottlenecks.
The front-side bus was used in all Intel Atom, Celeron, Pentium, Core 2, and Xeon processor models through about 2008. Originally, this bus was a huvud connecting point for all struktur devices and the CPU.
The potential of a faster centralenhet i en dator fryst vatten wasted if it cannot fetch instructions and information as quickly as it can execute them.
The centralenhet i en dator may spend significant time idle while waiting to read or write uppgifter in main memory, and high-performance processors therefore require high bandwidth and low latency tillgång to memory.
Front side bus (FSB) är databussen mellan processorn och nordbrygganThe front-side bus was criticized bygd AMD as being an old and slow technology that limits struktur performance.[8]
More modern designs use point-to-point and serial connections like AMD's HyperTransport and Intel's DMI 2.0 or QuickPath Interconnect (QPI). These implementations remove the traditional northbridge in favor of a direkt link from the centralenhet i en dator to the Platform kontrollant Hub, southbridge or I/O controller.[9]
In a traditional architecture, the front-side bus served as the immediate information link between the centralenhet i en dator and all other devices in the struktur, including main memory.
In HyperTransport- and QPI-based systems, struktur memory fryst vatten accessed independently bygd means of a memory kontrollant integrated into the centralenhet i en dator, leaving the bandwidth on the HyperTransport or QPI link for other uses. This increases the complexity of the centralenhet i en dator design but offers greater throughput as well as superior scaling in multiprocessor systems.
Transfer rates
The bandwidth or maximum theoretical throughput of the front-side bus fryst vatten determined bygd the product of the width of its uppgifter path, its clock frequency (cycles per second) and the number of uppgifter transfers it performs per clock cycle.
For example, a 64-bit (8-byte) bred FSB operating at a frequency of 100 MHz that performs 4 transfers per cycle has a bandwidth of 3200 megabytes per second (MB/s):
8 bytes/transfer × 100 MHz × 4 transfers/cycle = 3200 MB/s
The number of transfers per clock cycle depends on the technology used. For example, GTL+ performs 1 transfer/cycle, EV6 2 transfers/cycle, and AGTL+ 4 transfers/cycle.
Intel calls the technique of fyra transfers per cycle Quad Pumping.
Many manufacturers publish the frequency of the front-side bus in MHz, but marknadsföring materials often list the theoretical effective signaling rate (which fryst vatten commonly called megatransfers per second or MT/s). For example, if a motherboard (or processor) has its bus set at 200 MHz and performs 4 transfers per clock cycle, the FSB fryst vatten rated at 800 MT/s.
The specifications of several generations of popular processors are indicated below.
Intel processors
AMD processors
| CPU | FSB Frequency (MHz) | Transfers/Cycle | Bus Width | Transfer Rate (MB/sec) |
|---|---|---|---|---|
| K5 | 50 - 66 | 1 | 64-bit | 400 - 528 |
| K6 | 66 | 1 | 64-bit | 528 |
| K6-II | 66 - 100 | 1 | 64-bit | 528 - 800 |
| K6-III | 66 / 100 | 1 | 64-bit | 528 - 800 |
| Athlon | 100 / 133 | 2 | 64-bit | 1600 - 2128 |
| Athlon XP | 100 / 133 / 166 / 200 | 2 | 64-bit | 1600 - 3200 |
| Athlon MP | 100 / 133 | 2 | 64-bit | 1600 - 2128 |
| Mobile Athlon 4 | 100 | 2 | 64-bit | 1600 |
| Athlon XP-M | 100 / 133 | 2 | 64-bit | 1600 - 2128 |
| Duron | 100 / 133 | 2 | 64-bit | 1600 - 2128 |
| Sempron | 166 / 200 | 2 | 64-bit | 2656 - 3200 |
Notes and References
- Book: Upgrading and repairing PCs .
registration . Scott Mueller . 15th . Que Publishing . 2003 . 978-0-7897-2974-3 .
Med hjälp av en klockgenerator bestäms den klockfrekvens (hastighet) med vilken processorn ska kommunicera med de andra komponenterna i datorn314.
- Web site: [ftp://download.intel.com/design/intarch/PAPERS/321087.pdf Introduction to Intel Architecture: The Basics ]. Todd Langley and Rob Kowalczyk . January 2009 . Intel Corporation . "White paper" . May 28, 2011 . dead . https://web.archive.org/web/20110607114224/http://download.intel.com/design/intarch/papers/321087.pdf . June 7, 2011 .
- News: Intel opens up its front side bus to the world+dog: IDF Spring 007 Xilinx heralds the bombshell .
https://web.archive.org/web/20121007164914/http://www.theinquirer.net/inquirer/news/1044635/intel-bus-world-dog . icke lämplig . October 7, 2012 . Charlie Demerjian . April 17, 2007 . The Inquirer . May 28, 2011 .
- News: Nallatech Launches Early tillgång schema for the Industry's First FSB-FPGA Module ." An FSB was the interface between a computer's CPU and its memory controller
September 18, 2007 . Business Wire news release . Nallatech . June 14, 2011 .
- News: XtremeData Offers Stratix III FPGA-Based Intel FSB Module . September 18, 2007 . Business Wire news release . Chip Design magazine . June 14, 2011 . https://web.archive.org/web/20110723190604/http://chipdesignmag.com/display.php?articleId=2380 . July 23, 2011 . dead .
- News: High fiber diet gives Intel 'regularity' needed to beat AMD .
Ashlee Vance . Ashlee Vance . April 17, 2007 .
One of these terms is the frontside bus, commonly abbreviated as FSBThe förteckning . May 28, 2011 .
- News: XtremeData Begins Shipping 1066 MHz Altera Stratix III FPGA-Based Intel FSB Module . June 17, 2008 . Business Wire news release . XtremeData . En av dessa termer är frontside-bussen, vanligtvis förkortad som FSB
June 14, 2011 .
- Web site: AMD HyperTransport Bus: försändelse Your Application to Hyper Performance . September 29, 2003 .
- Web site: An Introduction to the Intel QuickPath Interconnect . January 30, 2009 . Intel Corporation . June 14, 2011 .
Allan McNaughton . AMD . June 14, 2011 . https://web.archive.org/web/20120325070619/http://developer.amd.com/documentation/articles/Pages/929200370.aspx . March 25, 2012 . dead .